1. Field of Invention
This invention is concerned with a circuit for controlling the advance of a timer circuit with a source of clocked pulses and, in particular to such a circuit, where there is, in addition, a second source of clocked pulses for advancing the timer which is not synchronized to the first source of clocked pulses.
2. Description of the Prior Art
Many single-chip microcomputers (CPU's) include one or more timers or timer-counters. These timers are advanced in synchronism with the microcomputer master clock signal and are read by executing an appropriate microcomputer timer read instruction. The read instructions are performed synchronously with the CPU's internal clocking signals so that the value in the timer is valid (i.e., a stable count) at the time when a read of the timer could occur. Such synchronization is available because the signal which advances the timer is synchronized with the signal which reads the timer value.
In some configurations the timer is clocked by an external clock, which may be completely asynchronous with the internal microcomputer clock pulses. In such situations the timer may produce an inaccurate readout when read with a signal synchronized with the internal clock signals. Alternatively elaborate synchronizing circuitry is required to ensure that the time readout is correct.